/*+***********************************************************************************
 Filename: 9k_mcu01_mycore_v001\src\mem\rom_async.v
 Description: rom with async read implement by verilog.
   With initial code instructions.
              
 Modification:
   2025.08.15 Creation   H.Zheng

Copyright (C) 2025  Zheng Hui (hzheng@gzhu.edu.cn)

License: MulanPSL-2.0

***********************************************************************************-*/

module rom_async #(parameter ROM_SIZE_IN_KB=1)(
  input wire [clogb2(ROM_SIZE_IN_KB*256-1)-1:0] addr,
  output wire [31:0] dout
);

//storage
  reg [31:0] BRAM[0:ROM_SIZE_IN_KB*256-1];

  initial begin
//    $fread(BRAM, $fopen("code.bin","r"));  //not work
//    $readmemh("code.hex", BRAM);  //hex format not work
    $readmemh("code.txt", BRAM);
    //ADDI x16, x16, 1 ;
    //JAL x0, -4	;
//    BRAM[0] = 32'h00180813;
//    BRAM[1] = 32'hFFDFF06F;
  end

  assign dout = BRAM[addr];



//
function integer clogb2;
    input integer depth;
        for (clogb2=0; depth>0; clogb2=clogb2+1)
            depth = depth >> 1;
endfunction

endmodule